Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-05-24

1997-07-01

Yoo, Do Hyun

Static information storage and retrieval

Interconnection arrangements

365 51, 36523006, G11C 1300

Patent

active

056445270

ABSTRACT:
A semiconductor memory device of the invention includes a plurality of word lines arranged along a first direction, a plurality of bit line pairs arranged along a second direction which crosses the first direction, a plurality of memory cells located at alternate crossings of the plurality of word lines and the plurality of bit line pairs, each of the plurality of memory cells being connected with one of the plurality of word lines and one bit line of one of the plurality of bit line pairs, and a plurality of sense amplifiers arranged along the first direction, each of the plurality of sense amplifiers being connected with one of the plurality of bit line pairs and amplifying a potential difference of the one bit line pair. In the semiconductor memory device, a region in which one of the sense amplifiers is formed has a larger width in the first direction than a width in the first direction of a region in which two columns of the memory cells connected to the one bit line pair connected to the sense amplifier.

REFERENCES:
patent: 5058058 (1991-10-01), Yasuda et al.
patent: 5091887 (1992-02-01), Asakura
patent: 5134588 (1992-07-01), Kubota et al.
patent: 5214600 (1993-05-01), Cho et al.
Yamauchi et al., "A Circuit Design to Suppress Asymmetrical Characteristics in a 16-Mbit DRAM Sense Amplifier" Symp. VLSI. Circuit Dig. Tech. Papers, (1989) pp. 109-110.
Geppert et al., "Ion Microbeam Probing of Sense Amplifiers to Analyze Single Event Upsets in a CMOS DRAM" IEEE Journal of Solid State Circuts, (1991) 26(2):132-134.

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