Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2009-07-02

2011-10-11

Sandvik, Benjamin (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular power supply distribution means

C257SE23179

Reexamination Certificate

active

08035135

ABSTRACT:
To facilitate counting of memory cells in failure analysis, without limiting the arrangement of memory cells or increasing the number of processes. A memory cell array region3in which memory cells3aare formed in a repetitive pattern is formed on a semiconductor substrate2. Power supply wirings4aand ground wirings4bin a predetermined layer formed on the memory cell array region3are vertically and horizontally arranged in the form of a gird to correspond to the arrangement of the memory cells3aat least in the memory cell array region3.

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