Semiconductor memory device

Static information storage and retrieval – Addressing – Sync/clocking

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365206, 36518905, G11C 800

Patent

active

048274542

ABSTRACT:
A semiconductor memory device, which can be maintained free from malfunction despite generation of current noise due to output signal variation in a output buffer circuit, is equipped with a switch in the input stage of the output buffer circuit, and the switch is so controlled as to be turned off during the period of time in which there exists the possibility that the output signal of the output buffer circuit may be changed by an address variation resulting from any current noise generated by variation in the output signal of the output buffer circuit.

REFERENCES:
patent: 4339809 (1982-07-01), Stewart
patent: 4573147 (1986-02-01), Aoyama et al.
patent: 4701889 (1987-10-01), Ando
patent: 4716550 (1987-12-01), Flannagan et al.

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