Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Reexamination Certificate
2010-12-17
2011-11-01
Nguyen, Dang (Department: 2824)
Static information storage and retrieval
Addressing
Including particular address buffer or latch circuit...
C365S201000, C365S230030
Reexamination Certificate
active
08050135
ABSTRACT:
A semiconductor memory device includes: a first address buffer configured to be used in a test mode and a normal mode and to receive more addresses in the test mode than in the normal mode; and a second address buffer configured to be used in the normal mode and disabled in the test mode.
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Blakely & Sokoloff, Taylor & Zafman
Hynix / Semiconductor Inc.
Nguyen Dang
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