Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2010-11-18
2011-10-25
Lappas, Jason (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S210100, C365S185090
Reexamination Certificate
active
08045389
ABSTRACT:
A dummy cell array is provided in a memory cell array, and an intermediate buffer is provided between input/output circuits, whereby control signals to the input/output circuits can be operated at high speed and with a high frequency while the area increasing effect is reduced even in a memory with a large bit width.
REFERENCES:
patent: 6111805 (2000-08-01), Furutani
patent: 2005/0024956 (2005-02-01), Tran et al.
patent: 2005/0286323 (2005-12-01), Ohtsuki et al.
patent: 2008/0175040 (2008-07-01), Kushida et al.
patent: 63-209094 (1988-08-01), None
patent: 11-353870 (1999-12-01), None
patent: 2006-012240 (2006-01-01), None
patent: 2008-177360 (2008-07-01), None
patent: 2009-116931 (2009-05-01), None
Agata Yasuhiro
Kanehara Hidenari
Masuo Akira
Sumitani Norihiko
Lappas Jason
McDermott Will & Emery LLP
Panasonic Corporation
LandOfFree
Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4267527