Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257SE21645, C257SE21703, C257SE27081, C257SE27084, C257SE27112, C257SE21575, C257SE23010, C257SE27009, C257S314000, C257S301000, C257S298000, C257S499000

Reexamination Certificate

active

08072077

ABSTRACT:
Disclosed herein is a semiconductor memory device for reducing a junction resistance and increasing amount of current throughout the unit cell. A semiconductor memory device comprises plural unit cells, each coupled to contacts formed in different shape at both sides of a word line in a cell array.

REFERENCES:
patent: 6420743 (2002-07-01), Hirano et al.
patent: 7075820 (2006-07-01), Yamada et al.
patent: 7388769 (2008-06-01), Miki
patent: 2005/0018471 (2005-01-01), Arimoto et al.
patent: 2006/0057814 (2006-03-01), Weis
patent: 2006/0076601 (2006-04-01), Hon et al.
patent: 2007/0158723 (2007-07-01), Yokoi
patent: 2008/0237776 (2008-10-01), Abbott
patent: 2010/0067284 (2010-03-01), Fukuda et al.
patent: 2005-191451 (2005-07-01), None
patent: 10-2008-0072385 (2008-08-01), None
patent: 10-2009-0071068 (2009-07-01), None

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