Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-08-09

2010-11-02

Elms, Richard (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185210, C365S185220, C365S185250, C365S189090, C365S210100, C365S210120, C365S210150, C365S149000

Reexamination Certificate

active

07826272

ABSTRACT:
The present invention solves a problem of the degradation of the long-term reliability of a conventional semiconductor memory device due to early deterioration of a FET included in a reference cell therein. DRAM1has word lines101to10n, word lines22and24, memory cells301to30nand a reference cell40. Gates of FETs32in the memory cells301to30nare connected to the word lines101to10nrespectively. Gates of a FET42and a FET44in the reference cell40are connected to the word line22for readout and the word line24for writing respectively. Here, potentials applied to the word lines22and24are lower than those applied to the word lines101to10n.

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