Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2008-12-29

2010-10-26

Lam, David (Department: 2827)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S230030, C365S189050, C365S233100

Reexamination Certificate

active

07821867

ABSTRACT:
A semiconductor memory device includes a plurality of address pads, a plurality of data pads, a mode entry controlling unit configured to control the entry to a data masking mode in response to a write command signal and signals inputted through predetermined pads among the plurality of address pads, a signal classifying unit configured to classify signals inputted sequentially and in parallel through the plurality of address pads into column address signals and data masking signals in response to an output signal of the mode entry controlling unit and a write latency signal, and a pad masking signal generating unit configured to generate pad masking signals to control the masking of data inputted through the plurality of data pads, where the pad masking signals are generated by converting the data masking signals in response to the output signal of the mode entry controlling unit.

REFERENCES:
patent: 7161870 (2007-01-01), Zitlaw et al.
patent: 2008-021364 (2008-01-01), None
Notice of Allowance issued from Korean Intellectual Property Office on May 31, 2010.

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