Semiconductor memory device

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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Details

C365S203000, C365S196000, C365S205000, C365S207000, C365S189170

Reexamination Certificate

active

07663962

ABSTRACT:
A semiconductor memory device includes a bank, a data transfer line, a precharge control circuit, and a precharge line. The bank includes a multiplicity of cell mats arranged in a matrix form. Each of the cell mats has a plurality of unit cells. The data transfer line arranged between the cell mats transfers a data signal outputted from a selected cell mat among the cell mats. The precharge control circuit disposed on the edge of the bank controls the precharge of the data transfer line. The precharge line arranged between first and second cell mats transfers a precharge voltage to the precharge control circuit. The first and the second cell mats are disposed in the center of the bank.

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