Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2006-11-22

2009-02-17

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S401000, C365S148000, C365S100000

Reexamination Certificate

active

07492033

ABSTRACT:
A semiconductor memory device includes a plurality of active regions, and a gate electrode in a fish bone shape arranged on each active region. In each active region, a plurality of source regions and a plurality of drain regions are arranged in a matrix manner. The source regions are commonly connected to a source line, and the drain regions are each connected to a lower electrode of a different memory element. According to the present invention, it is possible to assign three cell transistors connected in parallel to one memory element, so that an effective gate width is further increased.

REFERENCES:
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patent: 4860070 (1989-08-01), Arimoto et al.
patent: 6847113 (2005-01-01), Nakanishi et al.
patent: 6862214 (2005-03-01), Lee et al.
patent: 2006/0034112 (2006-02-01), Oh et al.
patent: 1484254 (2004-03-01), None
patent: 2005-71500 (2005-03-01), None
Chinese Office Action, with English Translation, issued in Chinese Patent Application No. CN 200610163036.7 dated on Aug. 29, 2008.

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