Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-01-22

2009-02-24

Nguyen, Dang T (Department: 2824)

Static information storage and retrieval

Format or disposition of elements

C365S230030, C365S063000

Reexamination Certificate

active

07495943

ABSTRACT:
If memory cell blocks are laid out in a conventional manner to create a memory chip with a capacity of an odd power of 2 by using memory cells whose aspect ratio is 1:2, the chip will take a 1:1 shape and become difficult to enclose in a package of a 1:2 shape. In addition, such conventional layout of memory cell blocks to form the 1:2 shape causes the area of a peripheral circuit region to be limited by the memory blocks, pads to be arranged collectively in the central section of the chip, and wiring to become dense during the enclosure of the chip in the package.In this invention, therefore, four memory blocks, BANK0, BANK1, BANK2, BANK3, BANK3, are constructed into an L shape and then these memory blocks are properly combined and arranged to construct a chip of nearly a 1:2 shape in terms of aspect ratio.

REFERENCES:
patent: 5966316 (1999-10-01), Tsukikawa
patent: 6980462 (2005-12-01), Ramesh et al.
patent: 7126837 (2006-10-01), Banachowicz et al.
patent: 11-145420 (1999-05-01), None

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