Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-01-31

2009-08-25

Mai, Son L (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185140, C365S185150, C365S185270

Reexamination Certificate

active

07580293

ABSTRACT:
A programmable non-volatile semiconductor memory device includes a select gate3, arranged in a first region on a substrate, a floating gate6arranged in a second region neighboring to the first region, a first diffusion region7provided in a third region neighboring to the second region, a control gate11arranged on the floating gate6, and a driving circuit22adapted for controlling voltages applied to the substrate1(well1a), select gate3, first diffusion region7and control gate11.The driving circuit performs control so that, during erasure operation, voltages applied to select gate3and the control gate11are negative, with the remaining voltage, applied to the substrate1(or well1a), being positive. The device permits erasure operation at a lower voltage.

REFERENCES:
patent: 6493262 (2002-12-01), Wald et al.
patent: 2002/0008277 (2002-01-01), Chen
patent: 2002/0019097 (2002-02-01), Arai et al.
patent: 2003/0071301 (2003-04-01), Wald et al.
patent: 2005/0029577 (2005-02-01), Nishizaka et al.
patent: 2006/0083066 (2006-04-01), Hasegawa et al.
patent: 2005-51227 (2005-02-01), None

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