Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2006-12-06

2009-06-02

Phan, Trong (Department: 2827)

Static information storage and retrieval

Powering

C365S201000, C365S189050, C365S154000, C365S156000

Reexamination Certificate

active

07542368

ABSTRACT:
A semiconductor memory device includes a memory cell having a circuit configuration in which a potential supplied to sources of load transistors108and111included in a latch section is different from at least one of a potential supplied to a word line105and a potential supplied to bit lines106and107;a latch potential control circuit101for switching a normal operation mode and a test mode to each other in accordance with a signal applied to a test mode setting pin102;and a read/write control circuit103for controlling the potential supplied to the sources of the load transistors108and111to be lower than at least one of the potential supplied to the word line105and the potential supplied to the bit lines106and107,during an arbitrary period of at least a read operation in the test mode.

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