Semiconductor memory device

Static information storage and retrieval – Interconnection arrangements – Transistors or diodes

Reexamination Certificate

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C365S063000, C365S214000

Reexamination Certificate

active

07457142

ABSTRACT:
A basic cell comprises a memory cell capable of retaining data having at least a binary value, a first selecting transistor connected between a first terminal of the memory cell and the Mth bit line, and a second selecting transistor connected between the first terminal of the memory cell and the M+1th bit line. Agate of the first selecting transistor is connected to the 2·N−1th selecting line, and a gate of the second selecting transistor is connected to the 2·Nth selecting line.

REFERENCES:
patent: 6847540 (2005-01-01), Kato et al.
patent: 6862205 (2005-03-01), Agata et al.
patent: 6885608 (2005-04-01), Nagano
patent: 7110318 (2006-09-01), Nii
patent: 2003/0072193 (2003-04-01), Kamei et al.
patent: 2004/0037143 (2004-02-01), Lovett
patent: 2005/0237848 (2005-10-01), Takashi et al.
patent: 2005/0254279 (2005-11-01), Schwerin
patent: 2003529880 (2003-10-01), None

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