Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2006-06-14
2008-10-21
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S208000
Reexamination Certificate
active
07440355
ABSTRACT:
The present invention provides a semiconductor memory device in which the number of write amplifiers is decreased by increasing the number of bit line pairs connected to one pair of common write data lines. Further, by decreasing the number of bit line pairs connected to one pair of common read data lines, parasitic capacitance connected to the pair of common read data lines is reduced and, accordingly, time in which the potential difference between the pair of common read data lines increases is shortened. Thus, while preventing enlargement of the chip layout area, read time can be shortened.
REFERENCES:
patent: 6381167 (2002-04-01), Ooishi et al.
patent: 6795332 (2004-09-01), Yamaoka et al.
patent: 2001-344965 (2000-06-01), None
patent: 2002-368135 (2001-06-01), None
Sato Hajime
Shinozaki Masao
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Hoang Huan
Reed Smith LLP
Renesas Technology Corp.
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