Semiconductor memory device

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Reexamination Certificate

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C365S222000, C365S226000

Reexamination Certificate

active

07427031

ABSTRACT:
A semiconductor memory device including a flash memory and a RAM incorporating a pseudo-SRAM contained in an MCP, has an internal transfer control signal for controlling internal data transfer between the flash memory and pseudo-SRAM, and an external transfer control signal for controlling data transfer between an external CPU and pseudo-SRAM, as control signals for the pseudo-SRAM. A flash controller in the RAM controls the internal transfer control signal so as to suspend the internal data transfer between the flash memory and pseudo-SRAM when the external CPU requests access to the pseudo-SRAM during the internal data transfer.

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Japanese Office Action issued Japanese Patent Application No. JP 2002-261460, dated Feb. 26, 2008.

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