Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-10-02

2007-10-02

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185090, C365S185120

Reexamination Certificate

active

11412938

ABSTRACT:
A semiconductor memory device includes: a memory cell array; a sense amplifier circuit for reading and writing data of the memory cell array page by page; a verify-judge circuit configured to judge write or erase completion based on the verify-read data held in the sense amplifier circuit; and data latches disposed for the respective columns in the memory cell array to be attached to the verify-judge circuit, into which column separation data are written to serve for excluding the corresponding columns from a verifying object, wherein the column separation data are automatically set in the data latches in an initial set-up mode at a power-on time so that at least a part of inaccessible columns for users are excluded from the verifying object.

REFERENCES:
patent: 5671178 (1997-09-01), Park et al.
patent: 5909399 (1999-06-01), Tanaka et al.
patent: 6259630 (2001-07-01), Kawamura
patent: 6831859 (2004-12-01), Hosono et al.
patent: 6859401 (2005-02-01), Hosono et al.
patent: 2006/0050564 (2006-03-01), Kojima et al.

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