Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-10-16

2007-10-16

Phung, Anh (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000

Reexamination Certificate

active

11323509

ABSTRACT:
The present invention provides a semiconductor memory device for reducing a power consumption. A semiconductor memory device includes a command decoding unit for decoding a plurality of commands; a driving signal generation unit for generating a plurality of driving signals synchronized with Nth clocks of an internal clock from an activation timing of a CAS signal generated by the command decoding unit, wherein N is an even integer number; an address delay unit for receiving an internal address in response to the CAS signal and for delaying the internal address signal by synchronizing the internal address with the plurality of driving signals; and a data access block for performing a data access in response to the delayed internal address.

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patent: 2004-253123 (2004-09-01), None

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