Semiconductor memory device

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S185140, C365S185180, C365S185020, C365S185110, C365S185170, C365S185260

Reexamination Certificate

active

10929572

ABSTRACT:
A semiconductor memory device includes: a memory cell array having word lines and bit lines disposed to cross each other, and memory cells disposed at crossings thereof; a controller configured to control operations of the memory cell array; and a word line drive circuit configured to set at least one of unselected word lines in an electrically floating state while driving a selected word line, based on input address and control signals output from said controller.

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U.S. Appl. No. 11/495,463, filed Jul. 31, 2006, Futatsuyama.
U.S. Appl. No. 10/929,572, filed Aug. 31, 2004, Hosono et al.

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