Semiconductor memory device

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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Details

C365S189011, C365S191000

Reexamination Certificate

active

11085471

ABSTRACT:
A cell array in the semiconductor memory device is divided into two blocks. Each of control signal lines for transmission of control signals are also divided into a first portion and a second portion correspondingly to the blocks. A repeater circuit that relays a control signal is provided between the two portions. The repeater circuit does not output the control signal from the first portion to the second portion, as long as a block that receives the control signal via the first portion is selected.

REFERENCES:
patent: 6760242 (2004-07-01), Park et al.
patent: 2004/0057304 (2004-03-01), Smits
patent: 58-199490 (1983-11-01), None
patent: 10-269765 (1998-10-01), None
patent: 2004-79077 (2004-03-01), None

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