Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2007-09-25
2007-09-25
Phung, Anh (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S203000
Reexamination Certificate
active
11332199
ABSTRACT:
The present invention for preventing a data error by satisfying specifications of tHD and tCBPH is provided. The semiconductor memory device having an enough margin for a write/read operation includes a pre-charging block for performing a pre-charging operation based on a chip selection control signal; a write/read strobe generating block for performing a write/read operation based on the chip selection control signal and a chip selection signal; and a chip selection buffering block for generating the chip selection control signal based on the chip selection signal to control a timing of the pre-charging operation and a timing of the write/read operation.
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Hynix / Semiconductor Inc.
McDermott Will & Emery LLP
Phung Anh
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