Semiconductor memory device

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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C365S194000, C365S233100

Reexamination Certificate

active

07099228

ABSTRACT:
A semiconductor memory device processes external commands in parallel using divided clocks, which embodies a high-speed operation of a DRAM in increase of clock frequency. In the semiconductor memory device, command processing blocks are separated into row and column paths in parallel, and the command processing blocks connected in parallel are sequentially latched by clocks obtained by dividing input clocks applied externally, thereby improving the operation speed of the DRAM at high operation and reducing power consumption.

REFERENCES:
patent: 6538956 (2003-03-01), Ryu et al.
patent: 6671787 (2003-12-01), Kanda et al.

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