Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2006-12-05

2006-12-05

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Powering

Conservation of power

Reexamination Certificate

active

07145830

ABSTRACT:
A semiconductor memory device is provided which effectively reduces a consumption of current of a system of circuits associated with refresh operations. A control signal circuit2controls n-channel transistors3C,4B to be in an OFF-state based on an internal chip select signal SCI in an interval time period between the refresh operations, wherein the n-channel transistors3C,4B are connected between the system of circuits associated with refresh operations (an internal voltage-down circuit3and a boost circuit4) and the ground, so as to break down a leak path of the system of circuits associated with refresh operations for reducing the leakage of current. At a timing of starting the refresh operation by triggering a timer, the internal chip select signal SCI is transitioned to a high level for supplying a ground voltage to the internal voltage-down circuit3and the boost circuit4.

REFERENCES:
patent: 5689460 (1997-11-01), Ooishi

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