Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1986-07-01

1987-06-30

Edlow, Martin H.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 36, 357 44, 357 46, 357 50, 357 15, 365155, 365156, 365179, 365180, H01L 2974

Patent

active

046774556

ABSTRACT:
In a semiconductor memory cell having PNPN type memory cells, a vertical PNPN element is used as a load transistor and a sense transistor or a hold transistor, or both. A buried layer is used as a wiring layer for a word line or a bit line, so that the switching speed can be increased and the memory cell area can be decreased.

REFERENCES:
patent: 3603820 (1971-09-01), Schuenemann
patent: 3623029 (1971-11-01), Davidson
patent: 3953866 (1976-04-01), Russell
patent: 3961351 (1976-06-01), Blatt
patent: 4144586 (1979-03-01), U
patent: 4484214 (1984-11-01), Misawa
IBM Technical Disclosure Bulletin, vol. 22, No. 1, Jun. 1979, Anantha et al., "Memory Cell Using Schottky Collector Vertical PNP Transistors, pp. 128-129, European Search Report, The Hague, Dec. 20, 1985, Examiner: A. Cardon.

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