Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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Details

C257S202000, C257S208000, C257S209000, C257S259000, C438S022000, C438S130000, C438S132000

Reexamination Certificate

active

06982471

ABSTRACT:
The present invention relates to a semiconductor memory device including a fuse box wherein the layout of a fuse box used to control a memory cell array is improved, a fuse box is divided into a plurality of blocks, and an index mark is applied to every fuse box or to every block so that a user may recognize each fuse box. In an embodiment, there is provided a semiconductor memory device including a fuse box comprising a plurality of cell matrices and a fuse box. The plurality of cell matrices are arranged adjacently each other. The fuse box is defined by a fuse barrier layer formed at a side of the plurality of cell matrices, wherein the fuse box comprises a plurality of cell matrices, wherein the fuse box comprises a plurality of fuses shared by the plurality of cell matrices, and the fuse barrier layer is configured to have a length long enough to be shared by the plurality of cell matrices.

REFERENCES:
patent: 6353570 (2002-03-01), Hwang et al.
patent: 6541290 (2003-04-01), Bang et al.

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