Static information storage and retrieval – Addressing – Byte or page addressing
Patent
1992-12-18
1994-03-22
LaRoche, Eugene R.
Static information storage and retrieval
Addressing
Byte or page addressing
36518912, G11C 800
Patent
active
052970299
ABSTRACT:
In reading data, data is transferred to data registers starting from a data read start address to the last address at a row (page), and data at the next page is transferred to the data registers starting from a start address to the last address at that page. These operations are repeated. In writing data from an intermediate address of a page, predetermined data is written in data registers not having write data. It is possible to read data at consecutive pages from a first predetermined column address to the page last address, and to read data at consecutive pages from a second predetermined column address to the page last address. For the data structure having a first data structure and a second data structure, it is possible to continuously read a set of data having both the first and second data structures and a set of data having only the second data structure, improving the efficiency of a system using a semiconductor memory device.
REFERENCES:
patent: 4873671 (1989-10-01), Kowshik
patent: 5050125 (1991-09-01), Momodomi et al.
patent: 5210723 (1993-05-01), Bates
NEC Technical Data Book IC Memory (pp. 1431-1458); NEC Corporation; Jul. 1991.
M. Hashimoto et al., "A 20-NS 256K X 4 FIFO Memory," IEEE Journal of Solid-State Circuits, vol. 23, No. 2, Apr. 1988, pp. 490-499.
Mitsubishi Technical Data Book IC Memory (Sec 4, pp. 114 thru 121); Mitsubishi Corp.; Sep. 1991.
Asano Masamichi
Kato Hideo
Nakai Hiroto
Tokushige Kaoru
Kabushiki Kaisha Toshiba
LaRoche Eugene R.
Zarabian A.
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