Semiconductor memory device

Static information storage and retrieval – Format or disposition of elements

Reexamination Certificate

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C365S063000, C365S230030

Reexamination Certificate

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06839261

ABSTRACT:
A semiconductor memory device comprises memory banks each including a memory cell array and a control circuit for the memory cell array and an interface circuit shared by the plural memory banks. The semiconductor memory device is adapted for performing reading of data from the plural memory banks and rewriting of data to the memory banks. In an operation mode for performing the reading, processings A1to A4are performed. In an operation mode for performing the rewriting, processings B1to B3are performed.

REFERENCES:
patent: 6125061 (2000-09-01), Mitani
patent: 6211015 (2001-04-01), Noble
patent: 6311241 (2001-10-01), Hofmann
patent: 6396744 (2002-05-01), Wong
patent: 6467015 (2002-10-01), Nolan et al.
patent: 6614703 (2003-09-01), Pitts et al.
patent: 2001084777 (2003-03-01), None

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