Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-03-01
2005-03-01
Auduong, Gene N. (Department: 2818)
Static information storage and retrieval
Addressing
Sync/clocking
C365S185050, C365S189070
Reexamination Certificate
active
06862251
ABSTRACT:
A semiconductor memory device includes a first nonvolatile memory cell, a bit line connected to the first nonvolatile memory cell, and a control circuit connected to the first nonvolatile memory cell and the bit line, and disposed and configured in such a manner as to reset the bit line to a predetermined first potential state only for a certain period “a” of time in response to transition of an input address signal. The first nonvolatile memory cell has a gate electrode formed on a semiconductor layer via a gate insulating film; a channel region disposed under the gate electrode; diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region; and memory functional units formed on both sides of the gate electrode and having the function of retaining charges.
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Iwata Hiroshi
Morikawa Yoshinao
Nawaki Masaru
Shibata Akihide
Yaoi Yoshifumi
Auduong Gene N.
Sharp Kabushiki Kaisha
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