Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1989-08-07

1991-02-05

Larkins, William D.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 55, 365149, G11C 11404, H01L 27108

Patent

active

049909800

ABSTRACT:
Island layers defined by grooves are formed on a p.sup.+ -type silicon substrate. One memory cell having a MOS capacitor and a MOSFET transistor is formed in each island layer. The MOS capacitor is buried in a groove surrounding the island layer and has a capacitor electrode insulatively provided over the bottom surface of the groove and an n.sup.- -type semiconductor layer formed in a ring-shaped manner in the side surface region of the groove and facing the capacitor electrode. The MOSFET has a ring-shaped gate electrode for in the groove to be insulatively stacked over the capacitor electrode. The gate electrode faces a p-type channel region formed in a ring-shaped manner in the side surface region of the island layer. Only a drain layer is formed in the top surface region of the island layer.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 4262298 (1981-04-01), Tuan et al.
patent: 4672410 (1987-06-01), Miura et al.
patent: 4673962 (1987-06-01), Chatterjee et al.

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