Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate
2006-05-23
2009-10-06
Tran, Minh-Loan T (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
C257S296000, C257SE27084
Reexamination Certificate
active
07598543
ABSTRACT:
A semiconductor memory component comprises at least one memory cell. The memory cell comprises a semiconductor body comprised of a body region, a drain region and a source region, a gate dielectric, and a gate electrode. The body region comprises a first conductivity type and a depression between the source and drain regions, and the source and drain regions comprise a second conductivity type. The gate electrode is arranged at least partly in the depression and is insulated from the body, source, and drain regions by the gate dielectric. The body region further comprises a first continuous region with a first dopant concentration and a second continuous region with a second dopant concentration greater than the first dopant concentration. The first continuous region adjoins the drain region, the depression and the source region, and the second region is arranged below the first region and adjoins the first region.
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German Office Action dated Jan. 25, 2006.
Hofmann Franz
Luyken Richard Johannes
Roesner Wolfgang
Specht Michael
Staedele Martin
Eschweiler & Associates LLC
Kuo W. Wendy
Qimonda AG
Tran Minh-Loan T
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