Static information storage and retrieval – Powering
Reexamination Certificate
2006-08-08
2006-08-08
Phan, Trong (Department: 2827)
Static information storage and retrieval
Powering
C365S227000
Reexamination Certificate
active
07088636
ABSTRACT:
The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
REFERENCES:
patent: 4782451 (1988-11-01), Mazzarella et al.
patent: 4961325 (1990-10-01), Halvorson et al.
patent: 5272676 (1993-12-01), Kubono et al.
patent: 5278797 (1994-01-01), Jeon et al.
patent: 5375093 (1994-12-01), Hirano
patent: 5495452 (1996-02-01), Cha
patent: 5532968 (1996-07-01), Lee
patent: 5544120 (1996-08-01), Kuwagata et al.
patent: 5652729 (1997-07-01), Iwata et al.
patent: 5966944 (1999-10-01), Inoue et al.
patent: 6304148 (2001-10-01), Nomura et al.
patent: 6430938 (2002-08-01), Royal et al.
patent: 6477847 (2002-11-01), Bonaquist et al.
patent: 6510096 (2003-01-01), Choi et al.
patent: 6512715 (2003-01-01), Okamoto et al.
patent: 6515928 (2003-02-01), Sato et al.
patent: 6563746 (2003-05-01), Fujioka et al.
patent: 6584032 (2003-06-01), Fujioka et al.
patent: 6668581 (2003-12-01), Acharya et al.
patent: 6721223 (2004-04-01), Matsumoto et al.
patent: 61-71494 (1984-09-01), None
patent: 3-46190 (1989-07-01), None
patent: 3-207084 (1990-01-01), None
patent: 4-192178 (1990-11-01), None
patent: 4-195890 (1990-11-01), None
patent: 5-54648 (1991-08-01), None
patent: 5-120870 (1991-10-01), None
patent: 5-189964 (1992-01-01), None
patent: 5-307882 (1992-04-01), None
patent: 5-342865 (1992-06-01), None
patent: 6-150647 (1992-11-01), None
patent: 7-41797 (1993-12-01), None
patent: 2000-30440 (1998-07-01), None
patent: 2000-163955 (1998-11-01), None
Akiba Takesada
Horiguchi Masashi
Tachibana Toshikazu
Ueda Shigeki
A. Marquez, Esq. Juan Carlos
Fisher, Esq. Stanely P.
Hitachi Device Engineering & Co., Ltd.
Phan Trong
Reed Smith LLP
LandOfFree
Semiconductor memory circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3690184