Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2002-06-24
2004-11-16
Thai, Luan (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S724000, C257S780000
Reexamination Certificate
active
06818983
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory chip and a semiconductor memory device which uses the memory chip.
2. Description of the Related Art
A memory (semiconductor memory device) having a large storage capacity represented by static RAM and dynamic RAM comprises a package, that houses a plurality of memory cells arranged in a high density on a semiconductor substrate and a control circuit that control the reading and writing of data from/to the memory cells being formed on the substrate and sealed in the package, and is mounted on a circuit board for use.
The semiconductor memory device of the prior art has terminals arranged in a pattern which is fixed for each product type. When a plurality of semiconductor memory devices are to be mounted on a circuit board to provide a large memory capacity, for example, the semiconductor memory devices are mounted on one surface of the circuit board.
However, when the semiconductor memory devices are mounted on a circuit board in such an arrangement as in the prior art, there are such problems as a large mounting area is required and the length of interconnection becomes long.
When the semiconductor memory devices are mounted on both surfaces of the circuit board, on the other hand, length of interconnection cannot be decreased enough since the terminals of the semiconductor memory device are arranged in a pattern fixed for each product type, thus resulting in such problems as the wiring pattern for the interconnection on the circuit board becomes complicated.
SUMMARY OF THE INVENTION
In view of the problems described above, an object of the present invention is to provide a semiconductor memory device that can be mounted on both sides of a circuit board having a relatively simple wiring pattern and can be manufactured at a low cost, and a semiconductor memory chip that is suitable for the constitution of the semiconductor memory device.
The semiconductor memory chip of the present invention includes a plurality of memory cells and a control circuit that controls the reading and writing of data from/to the memory cells. In the semiconductor memory, the memory cells and the control circuit are formed on a semiconductor substrate and a plurality of electrode pads are formed on one of the principal planes for the purpose of input and output of signals to/from the control circuit. The semiconductor memory chip of the present invention is characterized in that at least a pair of the electrode pads consist of selective connection electrode pads that can drive the control circuit by selecting and connecting either one thereof, and the two selective connection electrode pads are disposed on both sides of a longitudinal or lateral chip centerline on the one principal plane.
With the semiconductor memory chip having the constitution described above, since at least a pair of the electrode pads consist of the selective connection electrode pads, and the two selective connection electrode pads are disposed on both sides of a longitudinal or lateral chip centerline on the one principal plane, terminal arrangement can be changed when combined with a package or the like by selecting either one of the selective connection electrode pads, thus improving the degree of freedom in the design of the terminal arrangement. The semiconductor memory chip may be either a static RAM or a dynamic RAM.
The semiconductor memory device of the present invention includes the semiconductor memory chip and a package or a substrate. The package or the substrate has substrate pad electrodes to which the electrode pads of the semiconductor memory chip are connected and which are provided on one surface thereof. The package or the substrate has a plurality of terminals provided on the other surface, which have electrical continuity with the substrate pad electrodes. The plurality of terminals are disposed in such an arrangement as the terminals used for the input or output of signals of the same type are placed symmetrically on both sides of the longitudinal or lateral centerline on the other surface of the package or the substrate, while two selective connection terminals provided in correspondence to the pair of selective connection electrode pads are placed symmetrically on both sides of the centerline.
This constitution makes it possible to easily constitute the semiconductor memory devices for top surface mounting and bottom surface mounting simply by changing the connection between the semiconductor memory chip and the package or the substrate, using the same semiconductor memory chip and the package or the substrate described above.
In the semiconductor memory device of the present invention, the package or the substrate is preferably a ball grid array package or a ball grid array substrate.
REFERENCES:
patent: 5570274 (1996-10-01), Saito et al.
patent: 6617196 (2003-09-01), Iwaya et al.
patent: 7-131129 (1995-05-01), None
patent: 7-153903 (1995-06-01), None
patent: 11-150468 (1999-06-01), None
Renesas Technology Corp.
Thai Luan
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