Semiconductor memory cell device with thick insulative layer

Details Semiconductor memory cell device with thick insulative layer Semiconductor memory cell device with thick insulative layer

1988-07-07

1989-12-26

Mintel, William

357 235, 357 42, 357 41, 357 59, 357 67, H01L 2710

Patent

active

048901482

ABSTRACT:
A static RAM exhibiting a high reliability and suited to a higher density of integration is disclosed. In each memory cell of this static RAM, the cross coupling of a flip-flop circuit is made by gate electrodes of MISFETs constituting this flip-flop circuit. In addition, a source line is formed by the same step as that of a word line. A resistance value of a polycrystalline silicon layer which is a load resistor is changed in accordance with information to be stored. Furthermore, semiconductor regions for preventing soft errors attributed to alpha particles etc. are formed under the MISFETs constituting the flip-flop circuit, so that the channels are not adversely affected.

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Lyman, "Scaling the Barriers to VLSI's Fine Lines," Electronics, Jun. 19, 1980, pp. 115-123.
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Murarka, "Refractory Silicides for Integrated Circuits," J. Vac. Sci. Technol., 17(4), Jul./Aug. 1980, pp. 775-792.

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