Semiconductor memory cell capacitor and method for making the sa

Details Semiconductor memory cell capacitor and method for making the sa Semiconductor memory cell capacitor and method for making the sa

1987-11-09

1989-08-22

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 47, 437 48, 357 236, H01L 21265, H01L 2996

Patent

active

048596159

ABSTRACT:
A semiconductor memory device includes a trench formed along the circumference of a planar type memory capacitor, a gate insulating film and a memory cell plate being formed on the side wall of the trench, whereby the side wall of the trench is also used as a memory capacitor.
At the bottom of the trench, a thick insulating film is formed to be a cell separating region.

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patent: 4523369 (1985-06-01), Nagakubo
patent: 4570325 (1986-02-01), Higuchi
Furyama, "A Vertical Capacitor Cell for ULSI DRAM's" 1984 Symp. on ULSI Technology, Digest of Technical Papers' 10-12 Sep. 1984, San Diego pp. 16-17.
El-Kareh, "Trench Mode One-Device Memory Cell Process" IBM TDB, vol. 26, No. 9, Feb. 84. pp. 4699-4701.
Silverman, "Doped Trench Isolation Process," IBM TDB. vol. 25, No. 6 Nov. 82. pp. 3105-3106.
Wada et al., "A Folded Capacitor Cell (F.C.C.) for Future Megabit DRAM's" IEDM 1984 pp. 244-247.
Barsom "Dynamic DMOS Random-Access Memory Cell Design with Trench" IBM TDB, vol. 21, No. 7, Dec. 78 pp. 2755-2756.
Forger et al., "Improved V-Groove Technology" IBM TDB, vol. 22 No. 11 Apr. 80, p. 4886.
"Cell Structures For Future DRAM's", H. Sunami, Technical Digest of IEDM 1985, pp. 694-697.

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