Semiconductor memory cell and method of forming same

Details Semiconductor memory cell and method of forming same Semiconductor memory cell and method of forming same

2006-07-18

2006-07-18

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

C257S530000

Reexamination Certificate

active

07078273

ABSTRACT:
A semiconductor memory cell and forming method thereof utilizes a vertical select transistor to eliminate the problem of a large cell surface area in memory cells of the related art utilizing phase changes. A memory cell with a smaller surface area than the DRAM device of the related art is achieved by the present invention. Besides low power consumption during read operation, the invention also provides phase change memory having low power consumption even during write operation. Phase change memory also has stable read-out operation.

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Stefan Lai, Tyler Lowrey, “OUM—A 180 nm Nonvolatile Memory Cell Element Technology For Stand Alone and Embedded Applications”, 2001, IEDM Technical Digest Paper, pp. 36.5.

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