Semiconductor memory capable of simultaneously reading plural ad

Static information storage and retrieval – Addressing – Byte or page addressing

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Details

36523006, 36523003, 36518904, 340799, G11C 11418

Patent

active

049657704

ABSTRACT:
A semiconductor memory has a function which enables data to be simultaneously read out from four memory cells, that is, a first memory cell disposed at the intersection between a first data line and a first word line which correspond to address signals, respectively, a second memory cell disposed at the intersection between the first data line and a second word line to which is assigned a row address adjacent to the row address corresponding to the first word line, a third memory cell disposed at the intersection between the first word line and a second data line to which is assigned a column address adjacent to the column address corresponding to the first data line, and a fourth memory cell disposed at the intersection between the second data line and the second word line.

REFERENCES:
patent: 4561072 (1985-12-01), Arakawa et al.
patent: 4587637 (1986-05-01), Ishizuka
patent: 4597063 (1986-06-01), Takemae
patent: 4729119 (1988-03-01), Dennison et al.
patent: 4773048 (1988-09-01), Kai

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