Semiconductor memory capable of reducing erase time

Details Semiconductor memory capable of reducing erase time Semiconductor memory capable of reducing erase time

1995-05-12

1996-12-10

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular connection

36518522, 36518529, 36518533, G11C 1134

Patent

active

055838090

ABSTRACT:
A nonvolatile semiconductor memory comprising an erase pulse generator, an erase pulse counter and an erase verify signal generator. The erase pulse counter counts erase pulses output by the erase pulse generator, and the erase verify signal generator generates an erase verify signal. The erase pulse counter keeps the erase verify signal generator inactive until the number of the counted erase pulses exceeds a predetermined count. Only erase operations are allowed to continue while erase verify operations are being suppressed, until the erase pulse count exceeds the predetermined count. The scheme shortens the erase time involved.

REFERENCES:
patent: 5245572 (1993-09-01), Kosonocky et al.
patent: 5297096 (1994-03-01), Terada et al.
patent: 5343434 (1994-08-01), Noguchi
patent: 5347490 (1994-09-01), Terada et al.
patent: 5448712 (1995-09-01), Kynett et al.
"A 5-V-Only 16-MB Flash Memory With Sector Erase Mode", Jinbo et al, IEEE Journal of Solid-State Circuits, vol. 27, No. 11, Nov. 1992.

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