Semiconductor memory capable of preventing erroneous inversion o

Details Semiconductor memory capable of preventing erroneous inversion o Semiconductor memory capable of preventing erroneous inversion o

1998-09-25

1999-08-10

Tran, Andrew Q.

Static information storage and retrieval

Floating gate

Particular connection

36518511, 3651852, G11C 1604, G11C 2900

Patent

active

059368853

ABSTRACT:
A semiconductor memory including read memory cells, and detection memory cells, and being able to prevent an erroneous data inversion due to the time-varying reduction in the electric charge injected into their floating gate electrodes. The data in the read memory cells are read through read sense amplifiers, and the data in the detection memory cells are read by one or more detection sense amplifiers. The detection sense amplifiers are more likely to invert the data read out of the detection memory cells than the read sense amplifiers invert the data read out of the read memory cells. This enables the semiconductor memory to detect a sign of the data inversion through the outputs of the detection sense amplifiers before the data inversion of the desired data read from the read memory cells actually takes place, thereby preventing the data inversion of the desired data.

REFERENCES:
patent: 5671180 (1997-09-01), Higuchi

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