Static information storage and retrieval – Plural shift register memory devices
Patent
1997-04-04
2000-09-05
Zarabian, A.
Static information storage and retrieval
Plural shift register memory devices
365236, 3651892, 36523003, G11C 700
Patent
active
061152803
ABSTRACT:
A semiconductor memory for operating in burst mode. The memory has a memory cell array divided into a plurality of memory blocks, a plurality of (e.g., 2) output registers each including a plurality of output data retaining blocks corresponding to the multiple memory blocks, and a burst counter unit. The output registers alternately receive data transferred from the memory cell array. In accordance with the result of counting by the burst counter unit, the data retained in the output registers is output alternately in bursts, whereby the speed of data read operation in the memory is boosted regardless of the operating speed of the memory cell array therein.
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Mitsubishi Denki & Kabushiki Kaisha
Zarabian A.
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