Semiconductor memory array with field effect transistors program

Details Semiconductor memory array with field effect transistors program Semiconductor memory array with field effect transistors program

1975-12-29

1977-11-22

Hecker, Stuart N.

Static information storage and retrieval

Read only systems

Semiconductive

340166R, 357 91, 365178, G11C 1140, G11C 1700

Patent

active

040598268

ABSTRACT:
N-channel silicon gate MOS memory cells are programmed by an ion implant step which is done prior to forming the gates or the diffused source and drain regions. The implanted devices have a threshold voltage which is about zero, so the devices cannot be turned off at usual logic levels. Either ROM or RAM arrays can be made using implant for programming.

REFERENCES:
patent: 3865651 (1975-02-01), Arita
patent: 3876991 (1975-04-01), Nelson et al.
patent: 3914855 (1975-10-01), Cheney et al.
Grochowski, Rewritable IGFET Read-Only Store, IBM Technical Disclosure Bulletin, vol. 14, No. 1, 6/71, p. 263.
Terman, FET Memory Systems, IEEE Transactions on Magnetics, vol. Mag-6, No. 3, 9/70, pp. 584-589, s 145 7 0017.
Daughton, 256-Bit Chip for 128-Bit Latent Image Store, IBM Technical Disclosure Bulletin, vol. 15, No. 1, 6/72, p. 270, s2800-0256.

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