Semiconductor memory arrangement

Details Semiconductor memory arrangement Semiconductor memory arrangement

2007-08-03

2010-11-23

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Addressing

C365S051000, C365S063000, C365S212000

Reexamination Certificate

active

07839712

ABSTRACT:
A semiconductor memory arrangement includes a substrate, a first control device disposed on the substrate and adapted to receive command and address signals, a second control device, and a plurality of memory units. The second control device is adapted to receive the command and address signals from the first control device and to transmit the command and address signals to the memory units of the plurality of memory units.

REFERENCES:
patent: 6229726 (2001-05-01), Wang et al.
patent: 6628538 (2003-09-01), Funaba et al.
patent: 6751113 (2004-06-01), Bhakta et al.
patent: 7411807 (2008-08-01), Taylor
patent: 2008/0301349 (2008-12-01), Bacha

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