Semiconductor memory apparatus and method of driving the same

Details Semiconductor memory apparatus and method of driving the same Semiconductor memory apparatus and method of driving the same

2008-02-04

2010-10-19

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000, C365S191000, C365S233120, C365S233110, C365S233140, C365S233150

Reexamination Certificate

active

07817493

ABSTRACT:
A semiconductor memory apparatus according to an embodiment of the invention includes a delay enable unit that generates a delay enable signal in response to an external ODT signal and an idle signal, a delay selecting unit that outputs the idle signal or a delay idle signal, which is obtained by delaying the idle signal by a first delay time, in response to the delay enable signal, and a DLL clock control unit that generates a control signal in response to the idle signal or the delay idle signal during a slow power down exit mode.

REFERENCES:
patent: 6525988 (2003-02-01), Ryu et al.
patent: 6836437 (2004-12-01), Li et al.
patent: 6956922 (2005-10-01), Weldon et al.
patent: 2002/0083289 (2002-06-01), Ryoo et al.
patent: 2004/0212406 (2004-10-01), Jung
patent: 2006/0020835 (2006-01-01), Samson et al.
patent: 2007/0146029 (2007-06-01), Parikh
patent: 2005-251370 (2005-09-01), None
patent: 1020060082498 (2006-07-01), None
patent: 1020060087009 (2006-08-01), None

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