Semiconductor memory apparatus and a method for reading data...

Details Semiconductor memory apparatus and a method for reading data... Semiconductor memory apparatus and a method for reading data...

2009-05-22

2011-11-22

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S189050

Reexamination Certificate

active

08064283

ABSTRACT:
A semiconductor memory apparatus includes a data bus inversion (DBI) section configured to receive a plurality of input data and decide whether to invert or output, without an inversion, the plurality of input data depending upon logic levels of the plurality of data, and further configured to generate a plurality of inversion data based on the decision; and a data output section configured to receive the plurality of inversion data, invert or output, without an inversion the plurality of inversion data in response to a mode signal, and generate a plurality of output data.

REFERENCES:
patent: 7280412 (2007-10-01), Jang et al.
patent: 2007/0103996 (2007-05-01), Park
patent: 2007/0247989 (2007-10-01), Hein
patent: 2008/0019451 (2008-01-01), Jang et al.
patent: 04-219851 (1992-08-01), None
patent: 11-053885 (1999-02-01), None
patent: 1020050058914 (2005-06-01), None
patent: 1020070045644 (2007-05-01), None

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