Semiconductor memory and method of fabricating the same

Details Semiconductor memory and method of fabricating the same Semiconductor memory and method of fabricating the same

2005-11-30

2010-06-15

Richards, N Drew (Department: 2895)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

With electrical circuit layout

C438S128000

Reexamination Certificate

active

07736953

ABSTRACT:
A semiconductor memory includes first and second source regions that are formed in a semiconductor substrate and run in orthogonal directions. The first and second source regions are diffused regions and are electrically connected to each other at crossing portions thereof. The semiconductor device may further include drain regions formed in the semiconductor substrate, bit lines that run in the direction in which the second source region runs, and a source line formed above the second source region, wherein a contact between the source line and the second source region is aligned with contacts between the bit lines and drain regions formed in the semiconductor substrate.

REFERENCES:
patent: 6472275 (2002-10-01), Mizuhashi et al.
patent: 6603171 (2003-08-01), Grossi et al.
patent: 2001/0054735 (2001-12-01), Nagai
patent: 2002/0036927 (2002-03-01), Mori et al.
patent: 10-189919 (1998-07-01), None
patent: 2002-100689 (2002-04-01), None
International Search Report for PCT/JP2004/017809 (English translation).

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