Semiconductor memory and method of fabricating the same

Static information storage and retrieval – Interconnection arrangements

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Details

365 51, 36523003, G11C 506

Patent

active

056616767

ABSTRACT:
The invention provides a semiconductor memory including an address decoder, a first word line in electrical connection with an output terminal of the address decoder, a plurality of second word lines, a plurality of memory cells in electrical connection in parallel with each of the second word lines, a plurality of contacts each of which electrically connects each of the second word line to the first word line, and a compensator for signal delay among the memory cells in each of the second word lines. In accordance with the semiconductor memory, a group of the second word lines are connected to the first word line through a contact. Thus, since it is impossible for a memory cell in connection with the first word line through a defective contact to carry out writing data therein and reading data therefrom, such a memory cell can be readily, electrically found for removal.

REFERENCES:
patent: 5463577 (1995-10-01), Oowaki et al.

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