Semiconductor memory and method for operating a...

Details Semiconductor memory and method for operating a... Semiconductor memory and method for operating a...

2007-03-13

2007-03-13

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read only systems

C365S185160

Reexamination Certificate

active

11240659

ABSTRACT:
A method for operating a semiconductor memory (M) including a plurality of memory cells (MC), wherein the memory cells (MC) are arranged adjacent to one another, the arrangement starts with a first memory cell (MF) and ends with a last memory cell (ML), each memory cell (MC) has a first side (S) and a second side (D), the memory cells (MC) are connected by a bitline (BL) on the first side (S) of the memory cell and connected by another bitline (BL) on the second side (D) of the memory cell, the first side (S) of a memory cell is connected to a same bitline (BL) as the second side (D) of an adjacent memory cell, each of the memory cells (MC) is connected by a same wordline (WL), including the steps of: selecting a memory cell (MC) for operation, applying a first potential (VS) to all the bitlines (BL) connected to memory cells (MC) arranged to the first side (S) of the memory cell, applying a second potential (VD) to all the bitlines (BL) connected to memory cells (MC) arranged to the second side (D) of the memory cell, and performing the desired operation on the memory cell (MC).

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patent: 6600689 (2003-07-01), Hibino
patent: 2006/0245233 (2006-11-01), Mikolajick et al.

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