Semiconductor memory and memorizing method to read only semicond

Details Semiconductor memory and memorizing method to read only semicond Semiconductor memory and memorizing method to read only semicond

1992-10-28

1994-05-17

Popek, Joseph A.

Static information storage and retrieval

Read only systems

Semiconductive

365 96, G11C 1710

Patent

active

053134184

ABSTRACT:
A mask ROM of the invention comprises: a plurality of memory cells arranged m a matrix; a plurality of word lines, each connecting gates of the memory cells in the lateral direction; a plurality of bit lines which are constructed by serially connecting MOS transistors constructing the memory cells; a row decoder connected to the word lines; and a column decoder connected to the bit lines in which each memory cell is constructed by an MOS transistor and a resistor connected in parallel between the source and drain of each MOS transistor. The content of each memory cell is determined by whether the resistor 8 is cut out or not so that the steps up to the cutting step of the resistors 8 can be standardized while maintaining a high density in integration of the memory cells and the turn-around time can be reduced.

REFERENCES:
patent: 4802121 (1989-01-01), Schreck et al.
patent: 4888735 (1989-12-01), Lee
patent: 5049763 (1991-09-01), Rogers
"Design of CMOS Ultra LSI", Baifukan Co., Ltd., Apr. 25, 1989, Takuo Sugano, pp. 168-169.

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