Semiconductor memory activated by plurality of word lines on sam

Details Semiconductor memory activated by plurality of word lines on sam Semiconductor memory activated by plurality of word lines on sam

1995-12-01

1998-05-26

Nelms, David C.

Static information storage and retrieval

Interconnection arrangements

Transistors or diodes

365 72, 365154, 36523004, 36523006, G11C 506, G11C 800

Patent

active

057576890

ABSTRACT:
A semiconductor memory device including a plurality of memory cells arranged in a matrix; a plurality of bit lines; and a plurality of word lines controlled by column addresses for the same row addresses of the memory cells, wherein memory cells belonging to the same row are operatively connected to the bit lines by the plurality of word lines having the same row address and different column addresses.

REFERENCES:
patent: 5089992 (1992-02-01), Shinohara
patent: 5379246 (1995-01-01), Nogami
patent: 5463576 (1995-10-01), Kuriyama et al.
patent: 5519655 (1996-05-01), Greenberg

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