Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1995-04-03
1997-05-13
Popek, Joseph A.
Static information storage and retrieval
Addressing
Plural blocks or banks
365149, 36518904, G11C 800
Patent
active
056298994
ABSTRACT:
A semiconductor memory, such as, of a dual-port type includes dynamic RAM cells, such as of the single-transistor, single-capacitor type in which each such cell is coupled to one data line of a corresponding pair of data lines and a word line. The memory has a plurality of sense amplifiers which are coupled to a plurality of data line pairs, respectively, a plurality of pairs of switching MOSFETs respectively coupled between the plurality of data line pairs and a common data line pair for providing either selective or simultaneous connection of the plurality of data line pairs to the common data line during a first write mode and a second write mode, respectively. The disclosed memory also has a write circuit coupled between an external input/output terminal and a common data line pair and provides a first write signal which has a first two-level signal range in accordance with the first write mode and a second write signal having a second two-level signal range different from that of the first-signal range in accordance with the second write mode. The semiconductor memory is also used for storing image data and is provided with a serial output circuit having a converter coupling the plurality of data lines therethrough to a serial input/output port external terminal.
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Hitachi , Ltd.
Popek Joseph A.
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