Semiconductor memory

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

Reexamination Certificate

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Details

C257SE29170, C257SE29261

Reexamination Certificate

active

07825439

ABSTRACT:
A semiconductor memory according to an example of the invention includes active areas, and element isolation areas which isolate the active areas. The active areas and the element isolation areas are arranged alternately in a first direction. An n-th (n is odd number) active area from an endmost portion in the first direction and an (n+1)-th active area are coupled to each other at an endmost portion in a second direction perpendicular to the first direction.

REFERENCES:
patent: 6475891 (2002-11-01), Moon
patent: 2002/0132424 (2002-09-01), Furuhata
patent: 2006/0194429 (2006-08-01), Hashimoto et al.
patent: 2007/0105334 (2007-05-01), Jang et al.
patent: 2008/0006869 (2008-01-01), Kamigaichi et al.
patent: 2009/0057814 (2009-03-01), Izumi et al.
patent: 5-88375 (1993-04-01), None
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patent: 11-97652 (1999-04-01), None
patent: 2005-116551 (2005-04-01), None
patent: 2006-156657 (2006-06-01), None
patent: 2007-165862 (2007-06-01), None
U.S. Appl. No. 12/191,592, filed Aug. 14, 2008, Izumi, et al.
U.S. Appl. No. 12/729,626, filed Mar. 23, 2010, Shino, et al.

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